Foreword
Current, as embedded the systematic wide application in each domains, people is right embedded the demand that develops a tool also becomes very pressing. Embedded the development environment with development special need of the system, include across to compile commonly implement, across is debugged implement etc. Across debugs implement have kind of two kinds of implementation: One kind is piece on debug, another kind is in target aircraft end moving monitoring program is finished debug. Former the hardware that is processor debugs module to support, be like the EJTAG of MIPS framework, country the OnCE of core CPU, because be close to hardware ground floor, can offer below bare chance position debug a method, can debug software of monitoring program, system not only, also can use unit of attrib border scanning to check hardware circuit and breakdown fixed position; And latter is commonly after processor works normally, one kind when just can use debugs a method.
EJTAG(Enhanced Joint Test Action Group) is MIPS company foundation IEEE 1149. The basic construction of 1 agreement and function are patulous and those who make is normative, it is subsystem of software of ／ of a hardware, character is debugged in what processor interior realized to be based on hardware, use at be being debugged on support sheet.
Long Xin nucleus of a processor IP is in Long Xin on foundation of a processor, the height that undertake improvement to each respect such as power comsumption, area and function and gains the agile, processor kernel that applies to more extensive field. It uses RISC framework, can run market of MIPS III instruction, supportive EJTAG debugs a function, use can configure a framework, below the premise that can ask in contented user function, the product that realizes lowermost cost is compositive.

1EJTAG job mechanism reachs implementation
1. 1 EJTAG composition
The microprocessor of all MIPS or it is the support that the SoC chip package that includes MIPS nucleus all provides pair of EJTAG to debug. EJTAG interface uses the TAP(Test Access Port) of JTAG to visit means, the test data is passed into or come out processor nucleus. EJTAG realizable function includes: Much pace of ／ of breakpoint of hardware of ／ of software of space of memory of system of the register that visits processor, visit, setting, weak condition is carried out etc. If the graph is shown 1 times, EJTAG debugs functional module to comprise by 4 parts: The component of CPU nucleus interior is patulous, hardware breakpoint is odd
Yuan, debug control register (DCR) and TAP interface.

1. Mechanism of 2 EJTAG job
Processor is in a certain debug exception (Debug Exception, if weak condition moves, breakpoint) after generation, enter debug mode (Debug Mode) , after till DERET the instruction is carried out from debug mode to be retreated. In this paragraph of time, processor is carried out debug exception to handle a process. In debugging exception to handle a process, debug software to carry the visit operation of pair of TAP processor, the function such as the visit that realized space of memory of the visit to common register, visit of coprocessor, system. After debugging mode, allow to use a program or the system is exited is systematic code continues to carry out, until encounter the next to debug exception. Repeat above process, EJTAG realized weak condition to run much perhaps pace etc debug a function.
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